1. Field of the Invention
The present invention relates to an apparatus for deriving a frame correlation signal, and a frame synchronizing signal based on the frame correlation signal, for use in a digital radio receiving apparatus employing non-synchronous detection operation, in a radio data communication system.
2. Description of Related Art
In recent years, considerable research and development has been performed on radio communications systems for digital data communication. Typically, such a system employs multiplex operation, in which data communications is implemented using time-sharing by a number of users. Data are transmitted by quadrature modulation of a carrier, with the data being converted into a sequence of symbols each expressed as a vector, and corresponding quadrature baseband signals are recovered in each radio receiver apparatus by demodulating the received carrier using a local oscillator signal. The originally transmitted data are then recovered after periodically sampling the demodulated quadrature baseband symbols at timings corresponding to the symbol timings, to extract the successive symbols. The various problems which are presented by such a TDMA (time division multiple access) system when applied to mobile communications are discussed for example in an article "Fast Adaptive Equalizers for Narrow-Band TDMA Mobile Radio" by G. D'Aria, R Piermarini and V. Zingarelli, IEEE Trans. Veh. Technol., vol 40, No. 2, May 1991, pp 392-404. With such a system, it is basically necessary for each radio receiver of the system to accurately define the symbol timings of the received data, and also the timings of successive frames of that data. To enable generation reference and control signals for implementing these functions in each radio receiving apparatus, each data frame includes a known, fixed sequence of data referred to as a preamble (if located at the start of each frame), or a "midamble" if located centrally within each frame. If occurrences of these sequences are accurately detected in the receiving apparatus, then a frame (reference) synchronizing signal for defining successive frame intervals, and a symbol timing reference signal for extracting the symbols from the demodulated quadrature baseband signals, can be generated. In the following, a symbol sequence corresponding to the fixed data sequence will be referred to as the known symbol sequence.
One type of frame synchronizing apparatus for such applications utilizes a digital phase-locked loop (PLL) that uses as a phase reference signal a correlation signal, derived by detecting occurrences of the known symbol sequence (or the fixed data sequence itself, contained in the finally recovered data), to derive a frame synchronizing signal. A prior art example of such a frame synchronizing apparatus will be described referring to the block diagram of FIG. 1, in which numeral 41 denotes a pair of demodulated quadrature baseband signals. These are respective analog signals, consisting of an I (in-phase) and Q (quadrature) signal which in combination represent successive symbols, and are derived by demodulating a received quadrature modulation radio signal by a radio receiving circuit (not shown in the drawing). Numeral 42 denotes a data demodulation section, in which A/D conversion of these (analog) quadrature baseband signals is executed, to obtain a corresponding pair of digital quadrature baseband signals 43. Each of these signals, consisting of a train of digital sample values, is obtained by sampling the corresponding one of the I, Q analog quadrature baseband signals at a sampling rate which is higher than the symbol rate of the aforementioned symbols, i.e. oversampling of the symbols occurs.
In the example of FIG. 1, the digital quadrature baseband signal 43 is sent to a correlation signal generating section 44, for use in deriving a correlation signal 45, by detecting the known symbol sequence. The correlation signal 45 will in generally be obtained as a binary signal, e.g. which is normally at the L logic level, and attains the H logic level each time the known symbol sequence is detected. The correlation signal 45 is supplied to a frame synchronizing section 46, to be used in generating a frame synchronizing signal 47 which specifies the starting points of successive frame intervals, and may also be used in deriving a symbol timing reference signal which specifies the timings of the appropriate digital samples (in the symbol intervals of the received data) to be selected from the quadrature baseband signals 43 for use in extracting the transmitted data. These synchronizing and reference signals are sent to the data demodulation section 42, which thereby derives the originally transmitted data as the demodulated data signal 48.
As mentioned above, it is also possible to derive the correlation signal based upon detecting correlation with the fixed data sequence itself.
An example of a prior art type of configuration for the frame synchronizing section 46, utilizing a digital PLL, will be described referring to the block diagram of FIG. 2. In FIG. 2, numeral 45 denotes the correlation signal, and 47 denotes the frame synchronizing signal that is sent to the data demodulation section 42 in FIG. 1. 52 denotes a phase comparison section, which compares the phases of the correlation signal 45 and the frame synchronizing signal 47, to produce an output signal 53 expressing the amount of phase difference between these signals. A phase error counter 54 accumulates successive values of the phase error signal 53, and outputs a signal 55 expressing a value of cumulative phase error that is represented by the current count value of the phase error counter 54, which is sent to a phase error judgement section 56. The phase error judgement section 56 judges the value of the cumulative phase error signal 56, and produces a reset signal 57 and a frame phase error signal 62 in accordance with the judgement result. The frame phase error signal 62 is supplied to a phase control section 61, which outputs a phase control signal 60 based upon the frame phase error signal 62. The phase control signal 60 is supplied to a frame signal generating section 59, which generates the frame synchronizing signal 47 based on the phase control signal 60.
The operation of the frame synchronizing section 46 of such a prior art frame synchronizing apparatus is as follows. The phase comparison section 52 periodically (i.e. when the level of the correlation signal 45 exceeds a predetermined threshold value, once in each frame interval) compares the respective phases of the frame synchronizing signal 47 and the correlation signal 45. If the correlation signal 45 is found to be advanced in phase, then the phase error signal 53 is generated such as to increment the count held in the phase error counter 54 by a fixed amount, whereas if the correlation signal 45 is found to be delayed with respect to the current frame synchronizing signal 47, the cumulative phase error count held in the phase error counter 54 is decremented by that fixed amount. The phase error judgement section 56 interprets the cumulative phase error value as expressing either a positive or a negative value, and judges whether the absolute value of that cumulative phase error has exceeded a preset value. If that preset value is exceeded, then the phase error judgement section 56 generates the reset signal 57 to reset the phase error counter 54, and, if in that condition the sign of the cumulative phase error 55 is positive, the phase error judgement section 56 generates the frame phase error signal 62 with a value of +1, whereas if the absolute value of the cumulative phase error 55 exceeds the preset value and is negative, then the phase error judgement section 56 generates the frame phase error signal 62 with the value -1. If the frame phase error signal 62 takes the value +1 then the phase control section 61 generates the phase control signal 60 such as to control the frame signal generating section 59 to advance the phase of the frame synchronizing signal 47 by one unit, whereas if the frame phase error signal 62 is -1 then the phase of the frame synchronizing signal 47 is delayed by one unit.
However with such a prior art system, due to the fact that the count value held in the phase error counter is always changed each time that a comparison is executed between the phases of the locally generated frame synchronizing signal and the current frame synchronizing signal (even if the phase error is effectively zero), the phase error between the locally generated frame synchronizing signal and the current frame synchronizing signal varies continuously, with the amount of variation being equal to the period of an operating clock signal (not shown in the drawing) which controls the operation timings of the phase comparator section 52 and frame signal generating section 59, i.e. with the amount of variation being determined by the minimum unit of time used in controlling the phase of the frame synchronizing signal. That minimum time unit is identical to the sampling period of the digital samples into which the (analog) quadrature baseband signal of the system is converted, by A/D conversion. Various other timing and lower-frequency clock signals are derived from the operating clock signal.
Thus with such a prior art system, since the phase error of the frame synchronizing signal is constantly varying as described above, the period of the operating clock signal must be made sufficiently long to ensure that a sufficient degree of phase stability is maintained for the frame synchronizing signal. However this will in general conflict with other design requirements, and so presents a significant problem.
Problems also exist with prior types of apparatus for deriving a correlation signal based on the aforementioned known data sequence which occurs at a fixed position in each frame interval. FIG. 3 shows an example of such a prior art apparatus, in which the correlation signal is derived based on the known symbol sequence periodically occurring in the (analog) baseband signals. In FIG. 3, 92 denotes a data register which outputs a vector value sequence that expresses such a known symbol sequence. The term "vector value" will be used herein to designate a concurrent pair of digital values obtained as a sample of a pair of quadrature baseband signals, i.e. digital values respectively expressing the real and imaginary components of a signal vector in the complex plane. A vector correlation section 93 includes a shift register into which successive received vector values (i.e. of the digital quadrature baseband signals 90) are sequentially shifted, with the number of output vector values extracted in parallel from the shift register being equal to the number of symbols in the known symbol sequence. As a result, successive sequences of received vector values are outputted in parallel from the register 92. The vector correlation section 93 functions to obtain, for each of these sequences of received vector values, the degree of correlation with the known symbol sequence, as a set of correlation values which are supplied to an adder 95. The adder 95 obtains the sum of these correlation values, to produce a correlation signal 45.
However with such a prior art type of correlation derivation apparatus, there are conflicting requirements for obtaining a satisfactory correlation signal. Specifically, the length of the known symbol sequence should be as long as possible, to minimize the effects of noise on the correlation signal and maximize the amplitude variation of the correlation signal. However the longer the sequence, the greater will be an amount of phase rotation within each sequence of vector values extracted from the quadrature baseband signals. This is a phase rotation which results from a frequency offset of the local oscillator signal used in the radio receiving apparatus. Such phase rotation results in a decrease in the phase accuracy of the correlation signal, with that adverse effect being increased if the number of vector values constituting the known symbol sequence is increased. Thus, if the amount of carrier frequency offset is large, it becomes difficult to use a sufficiently long symbol sequence to obtain a satisfactory variation in amplitude of the correlation signal.